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General • PICO2 do PIO SM IRQs actually generate CPU interrupts?

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Does someone have a simple C program that shows this for the pico or pico2?

I'm working in C primarly on the PICO2. I've PIO0 statemachine 0 PIO code that is to generate an IRQ on the edges of a input signal. I've confirm the IRQ is executed by using a delay, eg irq 1 [31]. I've tried all the irqs, not just #1.

[At present it is just about learning to use the PICO hardware - esp the PIO - not solving the problem my using GPIO edge interrupts.]

I've enabled the 'routing of the SM IRQs to the CPU' with pio0->inte0 = 0xff00; // all SM0-7 should go to IRQ0

The PIO code does NOT access the FIFOs, however I've found that my C ISR does get called when I enabled the PIO TX fifos. Eg pio0->inte0 = 0x010;

I've also confirmed my isr will run if I trigger SM IRQs via :
pio0->force = 1;
or pio0->intf0 = 1; (which I have to clear in the ISR)


Code:

// the file: nrz_irq.pio.h#if !PICO_NO_HARDWARE#include "hardware/pio.h"#endif// ----- //// hello //// ----- //#define hello_wrap_target 0#define hello_wrap 8static const uint16_t hello_program_instructions[] = {            //     .wrap_target    0x00c2, //  0: jmp    pin, 2                         0x0000, //  1: jmp    0                              0xdf05, //  2: irq    nowait 5               [31]    0xdf00, //  3: irq    nowait 0               [31]    0xe801, //  4: set    pins, 1                [8]     0xe700, //  5: set    pins, 0                [7]     0x00c4, //  6: jmp    pin, 4                         0xdf02, //  7: irq    nowait 2               [31]    0x0000, //  8: jmp    0                                      //     .wrap};#if !PICO_NO_HARDWAREstatic const struct pio_program hello_program = {    .instructions = hello_program_instructions,    .length = 9,    .origin = -1,};static inline pio_sm_config hello_program_get_default_config(uint offset) {    pio_sm_config c = pio_get_default_sm_config();    sm_config_set_wrap(&c, offset + hello_wrap_target, offset + hello_wrap);    return c;}static inline void hello_init(PIO pio, uint sm, uint offset,                                            uint input_pin, uint output_pin) {    pio_sm_config c = hello_program_get_default_config(offset);    // Configure GPIO0 as input to PIO    pio_gpio_init(pio, input_pin);    sm_config_set_in_pins(&c, input_pin);    sm_config_set_jmp_pin(&c, input_pin);    // Configure GPIO2 as output from PIO    pio_gpio_init(pio, output_pin);    pio_sm_set_consecutive_pindirs(pio, sm, output_pin, 1, true);    sm_config_set_set_pins(&c, output_pin, 1);    // Load and start program    pio_sm_init(pio, sm, offset, &c);    pio_sm_set_enabled(pio, sm, true);}#endif

Code:

#include "hardware/pio.h"#include <stdio.h>#include <time.h>#include "pico/stdlib.h"#include "nrz_irq.pio.h"#include "hardware/irq.h"#include "hardware/clocks.h"#define CTRL_PIN 0   // input#define NRZ_PIN 2 #define DB_PIN 16 #define LED_PIN 25volatile int count =0;void usleep(int loop) {        for (int l = 0; l<loop; l++) {        for(int i=0;i<75;i++) asm ("nop");    }}volatile uint32_t status =0, s2=0,s3=0;void pio_irq_handler() {    gpio_put(DB_PIN, 1);     ++count;    status = pio0->ints0;    s2 = pio0->intr;    s3 = pio0->ints0;    pio0->irq = 0xFF; // clear all 8 IRQ flags    pio0->intf0 = 0;    usleep(10);    gpio_put(DB_PIN, 0); }int main() {    PIO pio;    uint sm;    uint offset;    stdio_init_all();       gpio_init(CTRL_PIN);    gpio_set_dir(CTRL_PIN, GPIO_IN);    gpio_init(LED_PIN);                    gpio_set_dir(LED_PIN, GPIO_OUT);    gpio_init(DB_PIN);    gpio_set_dir(DB_PIN,GPIO_OUT);    bool success = pio_claim_free_sm_and_add_program_for_gpio_range(&hello_program, &pio, &sm, &offset, NRZ_PIN, 1, true);    hard_assert(success);        printf("pio params:%x %d %x", pio, sm, offset);    hello_init(pio, sm, offset, CTRL_PIN, NRZ_PIN);        float sys_clk = (float)clock_get_hz(clk_sys);        // usually 125 MHz, 150 on pico2     float fdiv     = sys_clk / (39000.0f * 18.);            int div = fdiv;         pio_sm_set_clkdiv_int_frac8(pio, sm, div, 0);     printf("clk div:%d", div);        irq_set_exclusive_handler(PIO0_IRQ_0, pio_irq_handler);    irq_set_enabled(PIO0_IRQ_0, true);    // pio_set_irq0_source_mask_enabled(pio0, 0xff0f, true);    // pio_set_irq0_source_mask_enabled(pio0, 0xff00, true);    pio0->inte0 = 0xff00;    while (1) {                int state = gpio_get(CTRL_PIN);                pio0->intf0=0x0400;        printf("stat:%x %x %x count:%d\n\r",status, s2, s3, count);        // pio0->irq_force = 0x01;  // this triggers the ISR        sleep_ms(500);        // pio_sm_put(pio0, 0, 0x1234);    }}

Statistics: Posted by brainfog — Tue Oct 28, 2025 3:04 am — Replies 0 — Views 24



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