SDK • Atomic register offsets

The RP2040 datasheet says that the atomic register offsets are:

• Addr + 0x0000 : normal read write access
• Addr + 0x1000 : atomic XOR on write
• Addr + 0x2000 : atomic bitmask set on write
• Addr + 0x3000 : atomic bitmask clear on write

But the defines in /pico-sdk/src/rp2040/hardware_regs/include/hardware/regs/addressmap.h are:

#define REG_ALIAS_RW_BITS (0x0u << 12u)
#define REG_ALIAS_XOR_BITS (0x1u << 12u)
#define REG_ALIAS_SET_BITS (0x2u << 12u)
#define REG_ALIAS_CLR_BITS (0x3u << 12u)

The offset values are left-shifted 12 places? Shouldn't it be 3? Am I misunderstanding this?

Statistics: Posted by Mike**K — Sun Apr 06, 2025 9:17 pm — Replies 3 — Views 40

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