General • PIO Tx fifo woes

Hi guys.

I have a problem with a DC power line communication setup (which is giving me headaches) and I think the Pico could solve my problems quite elegantly.
Long story short, I need to keep the power/ data lines constantly switching (otherwise all hell breaks loose). So, I hooked up a signal generator to my setup and had it output a PWM with various duty cycles. Extremely responsive, edges clean as hell. Which got me thinking that this is exactly the kind of project where the Pico's PIO would shine.

So, I'm thinking of using a state machine to output a ~4Mhz frequency PWM with three duty cycles - one for each state: 1, 0, don't care (X).
The idea being that in organic comms, sometimes you just have gaps (which in my case would best be filled with a specific "value" a sister Pico would throw away instead of pushing to the RX Fifo). This way I can send binary data and still have a third value I can easily filter out on the other end.

My problem right now is the way I get data from the tx fifo into the osr.
This pulls 32 bits from the TX FIFO into the OSR. If the TX FIFO is empty, the OSR remains the same.
Normally, one would block here. I can't be blocking, though, because what I need to do is, in pseudocodeIs there any way I can check the fifo count, (or if it's empty), without relying on magick numbers (loading something like ~NULL in the OSR before pulling)?

Statistics: Posted by pauleffect — Tue Mar 04, 2025 9:49 pm — Replies 0 — Views 10

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