I am outputting 16 bit parallel data to a fast DAC using PIO and it was a straightforward process, easily achieved.
I now want to upgrade the DAC and the new one does not have a transparent mode, so it requires a clock signal going high when the data is stable.
It appeared to be a simple task to add a clock line and set or sideset it.
The problem is that I cannot get the clock line to work.
I have tried a variety of combinations of configurations and have managed:- clock but no data, data but no clock, no clock & no data.
The existing transparent mode just takes the data as it is sent, so it is a trivial PIO programme and simple configuration. I thought there would not be much more to add for the clock.
DATA: GPIO0 - GPIO15 CLOCK: GPIO21
Can anybody give me a configuration that works? I think I've found all the ones that don't ...
I now want to upgrade the DAC and the new one does not have a transparent mode, so it requires a clock signal going high when the data is stable.
It appeared to be a simple task to add a clock line and set or sideset it.
The problem is that I cannot get the clock line to work.
I have tried a variety of combinations of configurations and have managed:- clock but no data, data but no clock, no clock & no data.
The existing transparent mode just takes the data as it is sent, so it is a trivial PIO programme and simple configuration. I thought there would not be much more to add for the clock.
DATA: GPIO0 - GPIO15 CLOCK: GPIO21
Can anybody give me a configuration that works? I think I've found all the ones that don't ...
Statistics: Posted by PJR42 — Fri Jan 17, 2025 3:10 pm — Replies 2 — Views 66