Hello, I'm wondering about the possibility of using the rp2040 PIOs for cycle-accurate delayed triggering relative to a PIO-bit-banged protocol.
Here's the considered setup:
- PIO0 bit bangs a protocol (the FIFOs are used for communication with the ARM cores). One instruction of that protocol side-sets a pin.
- PIO1 (or another PIO0 SM set up to use another part of the instruction range), once armed by the MCU, loops on a pin physically connected (possibly adjacent) to the pin set by PIO0. On e.g rising rise, it waits a given number of clock cycles, then sets another pin that acts as trigger for an external system.
Both PIOs run at the same speed, synchronously to the same clock (1:1 master clock).
I'm wondering about the timing determinism of PIO0 sets the pin high > PIO1 reads the pin high, moreso than the latency. Is that ever random, or is it guaranteed to be a particular value ?
The value need not be 1 (iiuc, according to the datasheet, there's some buffering on reading GPIOs), but I need it not to be random for the trigger to be cycle-accurate.
I'm wondering about randomness because it's unclear to me 'when' GPIOs are set and read within a clock cycle. If not for the delay introduced by buffering, could PIO0 toggling a pin ever result in PIO1 reading the new value sometimes on the same cycle ?
Thanks.
Here's the considered setup:
- PIO0 bit bangs a protocol (the FIFOs are used for communication with the ARM cores). One instruction of that protocol side-sets a pin.
- PIO1 (or another PIO0 SM set up to use another part of the instruction range), once armed by the MCU, loops on a pin physically connected (possibly adjacent) to the pin set by PIO0. On e.g rising rise, it waits a given number of clock cycles, then sets another pin that acts as trigger for an external system.
Both PIOs run at the same speed, synchronously to the same clock (1:1 master clock).
I'm wondering about the timing determinism of PIO0 sets the pin high > PIO1 reads the pin high, moreso than the latency. Is that ever random, or is it guaranteed to be a particular value ?
The value need not be 1 (iiuc, according to the datasheet, there's some buffering on reading GPIOs), but I need it not to be random for the trigger to be cycle-accurate.
I'm wondering about randomness because it's unclear to me 'when' GPIOs are set and read within a clock cycle. If not for the delay introduced by buffering, could PIO0 toggling a pin ever result in PIO1 reading the new value sometimes on the same cycle ?
Thanks.
Statistics: Posted by JBernard — Thu Feb 01, 2024 11:27 am — Replies 0 — Views 19